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guix: use GCC 12.3.0

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Retain native GCC 10 toolchain for macOS, to prevent compile failures in
native tools (this will be removed entirely when we tansition to LLD).
Update the vmov-alignment patch, for changes in GCC 12.
This commit is contained in:
fanquake 2023-06-14 16:58:44 +01:00
parent ce54330cf6
commit 001412a4d2
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GPG Key ID: 2EEB9F5CC09526C1
2 changed files with 46 additions and 17 deletions
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25
contrib/guix/manifest.scm
View File

@ -91,7 +91,7 @@ chain for " target " development."))
(home-page (package-home-page xgcc))
(license (package-license xgcc)))))
(define base-gcc gcc-10)
(define base-gcc gcc-12)
(define base-linux-kernel-headers linux-libre-headers-6.1)
(define* (make-bitcoin-cross-toolchain target
@ -505,9 +505,6 @@ inspecting signatures in Mach-O binaries.")
automake
pkg-config
bison
;; Native GCC 10 toolchain
gcc-toolchain-10
(list gcc-toolchain-10 "static")
;; Scripting
python-minimal ;; (3.10)
;; Git
@ -516,14 +513,26 @@ inspecting signatures in Mach-O binaries.")
python-lief)
(let ((target (getenv "HOST")))
(cond ((string-suffix? "-mingw32" target)
;; Windows
(list zip
(list ;; Native GCC 12 toolchain
gcc-toolchain-12
(list gcc-toolchain-12 "static")
zip
(make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
nsis-x86_64
nss-certs
osslsigncode))
((string-contains target "-linux-")
(list (make-bitcoin-cross-toolchain target)))
(list ;; Native GCC 12 toolchain
gcc-toolchain-12
(list gcc-toolchain-12 "static")
(make-bitcoin-cross-toolchain target)))
((string-contains target "darwin")
(list clang-toolchain-17 binutils cmake-minimal python-signapple zip))
(list ;; Native GCC 10 toolchain
gcc-toolchain-10
(list gcc-toolchain-10 "static")
binutils
clang-toolchain-17
cmake-minimal
python-signapple
zip))
(else '())))))

38
contrib/guix/patches/vmov-alignment.patch
View File

@ -168,14 +168,19 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
default:
gcc_unreachable ();
}
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4981,13 +4981,13 @@
switch (type)
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size,
{
case opcode_int:
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
+ opcode = "vmovdqu32";
if (scalar_mode == E_HFmode)
- opcode = (misaligned_p
- ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64")
- : "vmovdqa64");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
else
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
+ opcode = "vmovdqu32";
break;
case opcode_float:
- opcode = misaligned_p ? "vmovups" : "vmovaps";
@ -187,9 +192,24 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
break;
}
}
@@ -4996,16 +4996,16 @@
switch (scalar_mode)
@@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size,
{
case E_HFmode:
if (evex_reg_p)
- opcode = (misaligned_p
- ? (TARGET_AVX512BW
- ? "vmovdqu16"
- : "vmovdqu64")
- : "vmovdqa64");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
else
- opcode = (misaligned_p
- ? (TARGET_AVX512BW
- ? "vmovdqu16"
- : "%vmovdqu")
- : "%vmovdqa");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
break;
case E_SFmode:
- opcode = misaligned_p ? "%vmovups" : "%vmovaps";
+ opcode = "%vmovups";
@ -208,7 +228,7 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
break;
default:
gcc_unreachable ();
@@ -5017,48 +5017,32 @@
@@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size,
{
case E_QImode:
if (evex_reg_p)