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Makefile: fix $(FORCE) in sub-Makefiles

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It needs to be defined before we include them.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
This commit is contained in:
Rusty Russell 2021-05-26 15:09:01 +09:30
parent d3f370944e
commit 40b264cf95
1 changed files with 5 additions and 5 deletions
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10
Makefile
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@ -258,6 +258,11 @@ endif
default: show-flags all-programs all-test-programs doc-all
ifneq ($(SUPPRESS_GENERATION),1)
FORCE = FORCE
FORCE::
endif
show-flags: config.vars
@$(ECHO) "CC: $(CC) $(CFLAGS) -c -o"
@$(ECHO) "LD: $(LINK.o) $(filter-out %.a,$^) $(LOADLIBES) $(EXTERNAL_LDLIBS) $(LDLIBS) -o"
@ -536,11 +541,6 @@ ncc: ${TARGET_DIR}/libwally-core-build/src/libwallycore.la
TAGS:
$(RM) TAGS; find * -name test -type d -prune -o -name '*.[ch]' -print -o -name '*.py' -print | xargs etags --append
ifneq ($(SUPPRESS_GENERATION),1)
FORCE = FORCE
FORCE::
endif
ccan/ccan/cdump/tools/cdump-enumstr: ccan/ccan/cdump/tools/cdump-enumstr.o $(CDUMP_OBJS) $(CCAN_OBJS)
ALL_PROGRAMS += ccan/ccan/cdump/tools/cdump-enumstr